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19-0221; Rev 3a; 11/97
LS MANUA ION KIT ALUAT DATA SHEET EV W FOLLO
Step-Down Controllers with Synchronous Rectifier for CPU Power
____________________________Features
o 96% Efficiency o 4.5V to 30V Input Range o 2.5V to 6V Adjustable Output o o o o o o o o o Preset 3.3V and 5V Outputs (at up to 10A) Multiple Regulated Outputs +5V Linear-Regulator Output Precision 2.505V Reference Output Automatic Bootstrap Circuit 150kHz/300kHz Fixed-Frequency PWM Operation Programmable Soft-Start 375A Typ Quiescent Current (VIN = 12V, VOUT = 5V) 1A Typ Shutdown Current
_______________General Description
The MAX796/MAX797/MAX799 high-performance, stepdown DC-DC converters with single or dual outputs provide main CPU power in battery-powered systems. These buck controllers achieve 96% efficiency by using synchronous rectification and Maxim's proprietary Idle ModeTM control scheme to extend battery life at full-load (up to 10A) and no-load outputs. Excellent dynamic response corrects output transients caused by the latest dynamic-clock CPUs within five 300kHz clock cycles. Unique bootstrap circuitry drives inexpensive N-channel MOSFETs, reducing system cost and eliminating the crowbar switching currents found in some PMOS/NMOS switch designs. The MAX796/MAX799 are specially equipped with a secondary feedback input (SECFB) for transformer-based dual-output applications. This secondary feedback path improves cross-regulation of positive (MAX796) or negative (MAX799) auxiliary outputs. The MAX797 has a logic-controlled and synchronizable fixed-frequency pulse-width-modulating (PWM) operating mode, which reduces noise and RF interference in sensitive mobile-communications and pen-entry applications. The SKIP override input allows automatic switchover to idle-mode operation (for high-efficiency pulse skipping) at light loads, or forces fixed-frequency mode for lowest noise at all loads. The MAX796/MAX797/MAX799 are all available in 16pin DIP and narrow SO packages. See the table below to compare these three converters.
PART MAX796 MAX797 MAX799 MAIN OUTPUT 3.3V/5V or adj. 3.3V/5V or adj. 3.3V/5V or adj. SPECIAL FEATURE Regulates positive secondary voltage (such as +12V) Logic-controlled low-noise mode Regulates negative secondary voltage (such as -5V)
MAX796/MAX797/MAX799
______________Ordering Information
PART MAX796CPE MAX796CSE MAX796C/D MAX796EPE MAX796ESE MAX796MJE TEMP. RANGE 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -55C to +125C PIN-PACKAGE 16 Plastic DIP 16 Narrow SO Dice* 16 Plastic DIP 16 Narrow SO 16 CERDIP
Ordering Information continued at end of data sheet. *Contact factory for dice specifications.
__________________Pin Configuration
TOP VIEW
SS 1 16 DH 15 LX 14 BST
________________________Applications
Notebook and Subnotebook Computers PDAs and Mobile Communicators Cellular Phones
(SECFB) SKIP 2 REF 3 GND 4 SYNC 5 SHDN 6 FB 7 CSH 8
MAX796 MAX797 MAX799
13 DL 12 PGND 11 VL 10 V+ 9 CSL
Idle Mode is a trademark of Maxim Integrated Products. U.S. and foreign patents pending.
DIP/SO
( ) ARE FOR MAX796/ MAX799.
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468.
Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
ABSOLUTE MAXIMUM RATINGS
V+ to GND .................................................................-0.3V, +36V GND to PGND........................................................................2V VL to GND ...................................................................-0.3V, +7V BST to GND ...............................................................-0.3V, +36V DH to LX...........................................................-0.3V, BST + 0.3V LX to BST.....................................................................-7V, +0.3V SHDN to GND............................................................-0.3V, +36V SYNC, SS, REF, FB, SECFB, SKIP, DL to GND..-0.3V, VL + 0.3V CSH, CSL to GND .......................................................-0.3V, +7V VL Short Circuit to GND..............................................Momentary REF Short Circuit to GND ...........................................Continuous VL Output Current ...............................................................50mA Continuous Power Dissipation (TA = +70C) SO (derate 8.70mW/C above +70C) ........................696mW Plastic DIP (derate 10.53mW/C above +70C) .........842mW CERDIP (derate 10.00mW/C above +70C) ..............800mW Operating Temperature Ranges MAX79_C_ _ ......................................................0C to +70C MAX79_E_ _....................................................-40C to +85C MAX79_MJE .................................................-55C to +125C Storage Temperature Range .............................-65C to +160C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V+ = 15V, GND = PGND = 0V, I VL = I REF = 0A, T A = 0C to +70C for MAX79_C, T A = 0C to +85C for MAX79_E, TA = -55C to +125C for MAX79_M, unless otherwise noted.) PARAMETER +3.3V AND +5V STEP-DOWN CONTROLLERS Input Supply Range 5V Output Voltage (CSL) 3.3V Output Voltage (CSL) Nominal Adjustable Output Voltage Range Feedback Voltage Load Regulation Line Regulation Current-Limit Voltage SS Source Current SS Fault Sink Current FLYBACK/PWM CONTROLLER SECFB Regulation Setpoint Falling edge, hysteresis = 15mV (MAX796) Falling edge, hysteresis = 20mV (MAX799) SHDN = 2V, 0mA < IVL < 25mA, 5.5V < V+ < 30V Rising edge, hysteresis = 15mV Rising edge, hysteresis = 25mV 2.45 -0.05 4.7 3.8 4.2 2.505 0 2.55 0.05 5.3 4.1 4.7 V MAX79_C MAX79_E/M 0mV < (CSH-CSL) < 80mV, FB = VL, 6V < V+ < 30V, includes line and load regulation 0mV < (CSH-CSL) < 80mV, FB = 0V, 4.5V < V+ < 30V, includes line and load regulation External resistor divider (CSH-CSL) = 0V 0mV < (CSH-CSL) < 80mV 25mV < (CSH-CSL) < 80mV 6V < V+ < 30V CSH-CSL, positive CSH-CSL, negative 80 -50 2.5 2.0 4.5 5.0 4.85 3.20 REF 2.43 2.505 2.5 1.5 0.04 100 -100 4.0 0.06 120 -160 6.5 5.10 3.35 30 30 5.25 3.46 6 2.57 V V V V V % %/V mV A mA CONDITIONS MIN TYP MAX UNITS
INTERNAL REGULATOR AND REFERENCE VL Output Voltage VL Fault Lockout Voltage VL/CSL Switchover Voltage V V V
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Step-Down Controllers with Synchronous Rectifier for CPU Power
ELECTRICAL CHARACTERISTICS (continued)
(V+ = 15V, GND = PGND = 0V, I VL = I REF = 0A, T A = 0C to +70C for MAX79_C, T A = 0C to +85C for MAX79_E, TA = -55C to +125C for MAX79_M, unless otherwise noted.) PARAMETER Reference Output Voltage Reference Fault Lockout Voltage Reference Load Regulation CSL Shutdown Leakage Current V+ Shutdown Current V+ Off-State Leakage Current Dropout Power Consumption Quiescent Power Consumption CONDITIONS No external load (Note 1) Falling edge 0A < IREF < 100A SHDN = 0V, CSL = 6V, V+ = 0V or 30V, VL = 0V SHDN = 0V, V+ = 30V, CSL = 0V or 6V FB = CSH = CSL = 6V, VL switched over to CSL V+ = 4V, CSL = 0V (Note 2) CSH = CSL = 6V SYNC = REF SYNC = 0V or 5V 270 125 200 200 Guaranteed by design 190 SYNC = REF SYNC = 0V or 5V SYNC SHDN, SKIP SYNC SHDN, SKIP SHDN, 0V or 30V SECFB, 0V or 4V Input Current SYNC, SKIP CSH, CSL, CSH = CSL = 6V, device not shut down FB, FB = REF DL Sink/Source Current DH Sink/Source Current DL On-Resistance DH On-Resistance DL forced to 2V DH forced to 2V, BST-LX = 4.5V High or low High or low, BST-LX = 4.5V 1 1 7 7 89 93 VL - 0.5 2.0 0.8 0.5 2.0 0.1 1.0 50 100 nA A A A 91 96 200 340 MAX79_C MAX79_E/M MAX79_C MAX79_E/M 0.1 1 1 1 1 4 4.8 300 150 MAX79_C MAX79_E/M MIN 2.46 2.45 1.8 TYP 2.505 MAX 2.54 2.55 2.3 50 1 3 5 3 5 8 6.6 330 175 UNITS V V mV A A A mW mW
MAX796/MAX797/MAX799
OSCILLATOR AND INPUTS/OUTPUTS Oscillator Frequency SYNC High Pulse Width SYNC Low Pulse Width SYNC Rise/Fall Time Oscillator Sync Range Maximum Duty Cycle Input High Voltage Input Low Voltage kHz ns ns ns kHz % V V
Note 1: Since the reference uses VL as its supply, V+ line-regulation error is insignificant. Note 2: At very low input voltages, quiescent supply current may increase due to excess PNP base current in the VL linear regulator. This occurs only if V+ falls below the preset VL regulation point (5V nominal). See the Quiescent Supply Current vs. Supply Voltage graph in the Typical Operating Characteristics.
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Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
ELECTRICAL CHARACTERISTICS (continued)
(V+ = 15V, GND = PGND = 0V, IVL = IREF = 0A, TA = -40C to +85C for MAX79_E, unless otherwise noted.) (Note 3) PARAMETER +3.3V and +5V STEP-DOWN CONTROLLERS Input Supply Range 5V Output Voltage (CSL) 3.3V Output Voltage (CSL) Nominal Adjustable Output Voltage Range Feedback Voltage Line Regulation Current-Limit Voltage FLYBACK/PWM CONTROLLER SECFB Regulation Setpoint Falling edge, hysteresis = 15mV (MAX796) Falling edge, hysteresis = 20mV (MAX799) SHDN = 2V, 0mA < IVL < 25mA, 5.5V < V+ < 30V Rising edge, hysteresis = 15mV Rising edge, hysteresis = 25mV No external load (Note 1) 0A < IREF < 100A SHDN = 0V, V+ = 30V, CSL = 0V or 6V FB = CSH = CSL = 6V, VL switched over to CSL 1 1 4.8 SYNC = REF SYNC = 0V or 5V 250 120 250 250 210 SYNC = REF SYNC = 0V or 5V High or low High or low, BST - LX = 4.5V 89 93 91 96 7 7 320 300 150 2.40 -0.08 4.7 3.75 4.2 2.43 2.505 2.60 0.08 5.3 4.05 4.7 2.57 50 10 10 8.4 350 180 V 0mV < (CSH - CSL) < 80mV, FB = VL, 6V < V+ < 30V, includes line and load regulation 0mV < (CSH - CSL) < 80mV, FB = VL, 4.5V < V+ < 30V, includes line and load regulation External resistor divider (CSH-CSL) = 0V 6V < V+ < 30V CSH - CSL, positive CSH - CSL, negative 70 -40 -100 5.0 4.70 3.10 REF 2.40 0.04 5.10 3.35 30 5.40 3.56 6.0 2.60 0.06 130 -160 V V V V V %/V mV CONDITIONS MIN TYP MAX UNITS
INTERNAL REGULATOR AND REFERENCE VL Output Voltage VL Fault Lockout Voltage VL/CSL Switchover Voltage Reference Output Voltage Reference Load Regulation V+ Shutdown Current V+ Off-State Leakage Current Quiescent Power Consumption OSCILLATOR AND INPUTS/OUTPUTS Oscillator Frequency SYNC High Pulse Width SYNC Low Pulse Width Oscillator Sync Range Maximum Duty Cycle DL On-Resistance DH On-Resistance kHz ns ns kHz % V V V V mV A A mW
Note 3: All -40C to +85C specifications above are guaranteed by design.
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Step-Down Controllers with Synchronous Rectifier for CPU Power
__________________________________________________Typical Operating Circuits
INPUT 4.5V TO 30V
MAX796/MAX797/MAX799
V+ SHDN
VL
MAX797
DH +3.3V OUTPUT
BST
SS REF
LX DL
PGND SYNC GND SKIP FB CSH CSL
INPUT 6V TO 30V
V+ SECFB SHDN FB VL +12V OUTPUT
MAX796
DH +5V OUTPUT
BST
LX DL SS REF GND SYNC PGND CSH CSL
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Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
_____________________________________Typical Operating Circuits (continued)
FROM REF
INPUT 6V TO 30V
V+ SECFB SHDN FB VL -5V OUTPUT
MAX799
DH
BST
+5V OUTPUT
LX DL SS REF GND SYNC PGND CSH CSL
__________________________________________Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
EFFICIENCY vs. LOAD CURRENT, 5V/3A CIRCUIT
MAX796-01
EFFICIENCY vs. LOAD CURRENT, 3.3V/3A CIRCUIT
MAX796-02
EFFICIENCY vs. LOAD CURRENT, 3.3V/10A CIRCUIT
SKIP = LOW 90 EFFICIENCY (%)
MAX796-03
100
VIN = 6V
100 VIN = 5V 90 EFFICIENCY (%) VIN = 12V 80 VIN = 30V
100
90 EFFICIENCY (%) VIN = 30V 80
80 SKIP = HIGH 70 60 50 40 STANDARD MAX797 3.3V/10A CIRCUIT, FIGURE 1 f = 300kHz VIN = 5V 0.1 1 LOAD CURRENT (A) 10
70 STANDARD MAX797 5V/3A CIRCUIT, FIGURE 1 f = 300kHz 0.001 0.01 0.1 1 10
70 STANDARD MAX797 3.3V/3A CIRCUIT, FIGURE 1 f = 300kHz 0.001 0.01 0.1 1 10
60
60
50 LOAD CURRENT (A)
50 LOAD CURRENT (A)
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Step-Down Controllers with Synchronous Rectifier for CPU Power
____________________________Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
QUIESCENT SUPPLY CURRENT vs. SUPPLY VOLTAGE, 5V/3A CIRCUIT IN IDLE MODE
15m SUPPLY CURRENT (A) 14m STANDARD MAX797 APPLICATION CONFIGURED FOR 5V SKIP = LOW SYNC = REF
MAX796-04
MAX796/MAX797/MAX799
QUIESCENT SUPPLY CURRENT vs. SUPPLY VOLTAGE, 3.3V/3A CIRCUIT IN IDLE MODE
MAX796-05
QUIESCENT SUPPLY CURRENT vs. SUPPLY VOLTAGE, LOW-NOISE MODE
MAX796-06
16m
1400 1200 SUPPLY CURRENT (A) 1000 800 600 400 200 0 NOT SWITCHING (FB FORCED TO 3.5V) STANDARD MAX797 3.3V/3A CIRCUIT, FIGURE 1 SKIP = LOW SYNC = REF 0 4 8 12 16 20 24 28 SWITCHING
30
SUPPLY CURRENT (mA)
20 f = 300kHz f = 150kHz 10 STANDARD MAX797 3.3V/3A CIRCUIT, FIGURE 1 SKIP = HIGH 0
800 600 400 200 0 0 4 8
12
16
20
24
28
32
32
0
4
8
12
16
20
24
28
32
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SHUTDOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE
1.4 SUPPLY CURRENT (A) 1.2 VIN - VOUT (mV) 1.0 0.8 0.6 0.4 0.2 0 0 4 8 12 16 20 24 28 32 SUPPLY VOLTAGE (V) DEVICE CURRENT ONLY SHDN = LOW
MAX796-07
DROPOUT VOLTAGE vs. LOAD CURRENT
MAX796-08
REF LOAD-REGULATION ERROR vs. LOAD CURRENT
MAX796-09
1.6
800 700 600 f = 300kHz 500 400 300 f = 150kHz 200 100 0 0.01 STANDARD MAX797 APPLICATION CONFIGURED FOR 5V VOUT > 4.8V 0.1 1
20 LOAD REGULATION V (mV)
15
10
5
0 1 10 100 1000 REF LOAD CURRENT (A)
10
LOAD CURRENT (A)
VL LOAD-REGULATION ERROR vs. LOAD CURRENT
MAX796-10
SWITCHING FREQUENCY vs. LOAD CURRENT
1000 SYNC = REF (300kHz) SKIP = LOW 100 +5V, VIN = 7.5V MAXIMUM SECONDARY CURRENT (mA) 450 400 350 300 250 200 150 100 50 0 1m 10m 100m 1
MAX796 MAXIMUM SECONDARY CURRENT vs. SUPPLY VOLTAGE, 5V/15V CIRCUIT
IOUT (MAIN) = 0A
MAX796-11
500 LOAD REGULATION V (mV)
400 300
SWITCHING FREQUENCY (kHz)
IOUT (MAIN) = 3A
10
+5V, VIN = 30V
200
100
1
+3.3V, VIN = 7.5V
CIRCUIT OF FIGURE 11 TRANSFORMER = TTI5870 VSEC > 12.75V 0 4 8 12 16 20 24 28 32
0 0 20 40 60 80 VL LOAD CURRENT (mA)
0.1 100
LOAD CURRENT (A)
SUPPLY VOLTAGE (V)
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Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
____________________________Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
MAX796 MAXIMUM SECONDARY CURRENT vs. SUPPLY VOLTAGE, 3.3V/5V CIRCUIT
MAX796-12
MAX799 MAXIMUM SECONDARY CURRENT vs. SUPPLY VOLTAGE, 5V CIRCUIT
MAXIMUM SECONDARY CURRENT (mA) 700 600 500 400 IOUT (MAIN) = 1A 300 200 100 0 0 4 8 12 CIRCUIT OF FIGURE 13 TRANSFORMER = TTI5926 VSEC -5.1V IOUT (MAIN) = 0A
MAX796-13
1050 MAXIMUM SECONDARY CURRENT (mA) IOUT (MAIN) = 2A 900 750 IOUT (MAIN) = 0A 600 450 300 150 0 0 3 6 9 12 15 18 21 CIRCUIT OF FIGURE 12 TRANSFORMER = TDK 1.5:1 VSEC 4.8V
800
24
16
20
24
28
32
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
PULSE-WIDTH-MODULATION MODE WAVEFORMS
IDLE-MODE WAVEFORMS
LX VOLTAGE 10V/div
+5V OUTPUT 50mV/div
+5V OUTPUT VOLTAGE 50mV/div
2V/div
500ns/div ILOAD = 1A, VIN = 16V, CIRCUIT OF FIGURE 1
200s/div ILOAD = 100mA, VIN = 10V, CIRCUIT OF FIGURE 1
+5V LOAD-TRANSIENT RESPONSE
3A 0A
LOAD CURRENT
+5V OUTPUT 50mV/div
200s/div VIN = 15V, CIRCUIT OF FIGURE 1
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Step-Down Controllers with Synchronous Rectifier for CPU Power
______________________________________________________________Pin Description
PIN 1 NAME SS SECFB (MAX796/ MAX799) 2 SKIP (MAX797) 3 4 REF GND FUNCTION Soft-Start timing capacitor connection. Ramp time to full current limit is approximately 1ms/nF. Secondary winding Feedback input. Normally connected to a resistor divider from an auxiliary output. Don't leave SECFB unconnected. * MAX796: SECFB regulates at VSECFB = 2.505V. Tie to VL if not used. * MAX799: SECFB regulates at VSECFB = 0V. Tie to a negative voltage through a high-value current-limiting resistor (IMAX = 100A) if not used. Disables pulse-skipping mode when high. Connect to GND for normal use. Don't leave SKIP unconnected. With SKIP grounded, the device will automatically change from pulse-skipping operation to full PWM operation when the load current exceeds approximately 30% of maximum. (See Table 3.) Reference voltage output. Bypass to GND with 0.33F minimum. Low-noise analog Ground and feedback reference point. Oscillator Synchronization and frequency select. Tie to GND or VL for 150kHz operation; tie to REF for 300kHz operation. A high-to-low transition begins a new cycle. Drive SYNC with 0V to 5V logic levels (see the Electrical Characteristics table for VIH and VIL specifications). SYNC capture range is 190kHz to 340kHz guaranteed. Shutdown control input, active low. Logic threshold is set at approximately 1V (VTH of an internal N-channel MOSFET). Tie SHDN to V+ for automatic start-up. Feedback input. Regulates at FB = REF (approximately 2.505V) in adjustable mode. FB is a Dual-ModeTM input that also selects the fixed output voltage settings as follows: * Connect to GND for 3.3V operation. * Connect to VL for 5V operation. * Connect FB to a resistor divider for adjustable mode. FB can be driven with +5V rail-to-rail logic in order to change the output voltage under system control. Current-Sense input, High side. Current-limit level is 100mV referred to CSL. Current-Sense input, Low side. Also serves as the feedback input in fixed-output modes. Battery voltage input (4.5V to 30V). Bypass V+ to PGND close to the IC with a 0.1F capacitor. Connects to a linear regulator that powers VL. 5V Internal linear-regulator output. VL is also the supply voltage rail for the chip. VL is switched to the output voltage via CSL (VCSL > 4.5V) for automatic bootstrapping. Bypass to GND with 4.7F. VL can supply up to 5mA for external loads. Power Ground. Low-side gate-drive output. Normally drives the synchronous-rectifier MOSFET. Swings 0V to VL. Boost capacitor connection for high-side gate drive (0.1F). Switching node (inductor) connection. Can swing 2V below ground without hazard. High-side gate-drive output. Normally drives the main buck switch. DH is a floating driver output that swings from LX to BST, riding on the LX switching-node voltage.
MAX796/MAX797/MAX799
5
SYNC
6
SHDN
7
FB
8 9 10
CSH CSL V+
11 12 13 14 15 16
VL PGND DL BST LX DH
Dual Mode is a trademark of Maxim Integrated Products.
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9
Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
______Standard Application Circuit
It is easy to adapt the basic MAX797 single-output 3.3V buck converter (Figure 1) to meet a wide range of applications with inputs up to 28V (limited by choice of external MOSFET). Simply substitute the appropriate components from Table 1. These circuits represent a good set of tradeoffs between cost, size, and efficiency while staying within the worst-case specification limits for stress-related parameters such as capacitor ripple current. Each of these circuits is rated for a continuous load current at TA = +85C, as shown. The 1A, 2A and 10A applications can withstand a continuous output short-circuit to ground. The 3A and 5A applications can withstand a short circuit of many seconds duration, but the synchronous-rectifier MOSFET overheats, exceeding the manufacturer's ratings for junction temperature by 50C or more. If the 3A or 5A circuit must be guaranteed to withstand a continuous output short circuit indefinitely, see the section MOSFET Switches under Selecting Other Components. Don't change the frequency of these circuits without first recalculating component values (particularly inductance value at maximum battery voltage).
_______________Detailed Description
The MAX796 is a BiCMOS, switch-mode power-supply controller designed primarily for buck-topology regulators in battery-powered applications where high efficiency and low quiescent supply current are critical. The MAX796 also works well in other topologies such as boost, inverting, and CLK due to the flexibility of its floating high-speed gate driver. Light-load efficiency is enhanced by automatic idle-mode operation--a variable-frequency pulse-skipping mode that reduces
INPUT C1 C7 0.1F 10 V+ ON/OFF CONTROL 6 SHDN 11 VL DH BST 2 16 14 15 C3 0.1F L1 R1 C2 Q2 D1 GND OUT +3.3V OUTPUT D2 CMPSH-3 Q1 C4 4.7F
+5V AT 5mA
LOW-NOISE CONTROL
SKIP
MAX797
LX
DL PGND 1 C6 0.01F (OPTIONAL) FB 7 NOTE: KEEP CURRENT-SENSE LINES SHORT AND CLOSE TOGETHER. SEE FIG. 10 SYNC 5 SS CSH CSL GND REF
13 12 8 9 4 3 C5 0.33F
J1 150kHz/300kHz JUMPER
REF OUTPUT +2.505V AT 100A
Figure 1. Standard 3.3V Application Circuit
10 ______________________________________________________________________________________
Step-Down Controllers with Synchronous Rectifier for CPU Power
Table 1. Component Selection for Standard 3.3V Applications
COMPONENT Input Range Application Frequency Q1 High-Side MOSFET Q2 Low-Side MOSFET C1 Input Capacitor C2 Output Capacitor LOAD CURRENT 1A 4.75V to 18V PDA 150kHz 2A 4.75V to 18V Sub-Notebook 300kHz 3A 4.75V to 28V Notebook 300kHz Motorola MMSF5N03HD or Si9410 Motorola MMSF5N03HD or Si9410 4A 4.75V to 24V High-End Notebook 300kHz Motorola MTD20N03HDL DPAK Motorola MTD20N03HDL DPAK 10A 4.5V to 6V Desktop 5V-to-3V 300kHz Motorola MTD75N03HDL D2PAK Motorola MTD75N03HDL D2PAK
MAX796/MAX797/MAX799
Motorola 1/2 International Rectifier MMDF3N03HD or 1/2 1/2 IRF7101 Si9936 Motorola 1/2 International Rectifier MMDF3N03HD or 1/2 1/2 IRF7101 Si9936 22F, 35V AVX TPS or Sprague 595D 2 x 22F, 35V AVX TPS or Sprague 595D
2 x 220F, 10V 2 x 22F, 35V AVX 4 x 22F, 35V AVX Sanyo OS-CON TPS or Sprague 595D TPS or Sprague 595D 10SA220M 220F, 10V AVX TPS or Sprague 595D 4 x 220F, 10V 3 x 220F, 10V AVX Sanyo OS-CON TPS or Sprague 595D 10SA220M
150F, 10V AVX TPS 150F, 10V AVX TPS or Sprague 595D or Sprague 595D 1N5817 Motorola MBR0502L SOD-89 0.062 IRC LR2010-01-R062 1N5817 NIEC EC10QS02L or Motorola MBRS130T3 0.039 IRC LR2010-01-R039
D1 Rectifier
1N5819 NIEC 1N5821 NIEC 1N5820 NIEC EC10QS03 or NSQ03A04 or NSQ03A02, or Motorola MBRS130T3 Motorola MBRS340T3 Motorola MBRS340T3 0.025 IRC LR2010-01-R025 10H, 3A Ferrite Sumida CDRH125 0.015 IRC LR2010-01-015 3 x 0.02 IRC LR2010-01-R020 (3 in parallel)
R1 Resistor
L1 Inductor
47H, 1.2A Ferrite or 33H, 2.2A Ferrite Kool-Mu Dale LPE6562-330MB Sumida CD75-470
1.5H, 11A, 3.5m 4.7H, 5.5A Ferrite Coiltronics Coilcraft DO3316-472 CTX03-12357-1
Table 2. Component Suppliers
MANUFACTURER AVX Central Semiconductor Coilcraft Coiltronics Dale International Rectifier IRC Kemet Matsuo Motorola * Distributor USA PHONE (803) 946-0690 (516) 435-1110 (847) 639-6400 (561) 241-7876 (605) 668-4131 (310) 322-3331 (512) 992-7900 (864) 963-6300 (714) 969-2491 (602) 303-5454 FACTORY FAX [Country Code] [1] 803-626-3123 [1] 516-435-1824 [1] 847-639-1469 [1] 561-241-9339 [1] 605-665-1627 [1] 310-322-3332 [1] 512-992-3377 [1] 864-963-6521 [1] 714-960-6492 [1] 602-994-6430 MANUFACTURER Murata-Erie NIEC Sanyo Siliconix Sprague Sumida TDK Transpower Technologies USA PHONE (814) 237-1431 (800) 831-9172 FACTORY FAX [Country Code] [1] 814-238-0490
(805) 867-2555* [81] 3-3494-7414 (619) 661-6835 [81] 7-2070-1174 (408) 988-8000 (800) 554-5565 (603) 224-1961 (847) 956-0666 (847) 390-4461 (702) 831-0140 [1] 408-970-3950 [1] 603-224-1430 [81] 3-3607-5144 {1} 847-390-4405 [1] 702-831-3521
losses due to MOSFET gate charge. The step-down power-switching circuit consists of two N-channel MOSFETs, a rectifier, and an LC output filter. The output voltage is the average of the AC voltage at the switching node, which is adjusted and regulated by changing the duty cycle of the MOSFET switches. The
gate-drive signal to the N-channel high-side MOSFET must exceed the battery voltage and is provided by a flying capacitor boost circuit that uses a 100nF capacitor connected to BST. The MAX796 contains nine major circuit blocks, which are shown in Figure 2.
11
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Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
BATTERY VOLTAGE
TO CSL
V+
4.5V
+5V LINEAR REGULATOR SHDN
OUT
VL
+5V AT 5mA AUXILIARY OUTPUT
BST SECFB PWM LOGIC DH LX MAIN OUTPUT
DL +2.505V REF PWM COMPARATOR REF CSL GND
LPF 60kHz
PGND
+2.505V AT 100A
CSH
3.3V FB
ON/OFF
5V FB SHDN
SS ADJ FB FB
4V
MAX796
SYNC 1V
Figure 2. MAX796 Block Diagram
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Step-Down Controllers with Synchronous Rectifier for CPU Power
PWM Controller Blocks: * Multi-Input PWM Comparator * Current-Sense Circuit * PWM Logic Block * Dual-Mode Internal Feedback Mux * Gate-Driver Outputs * Secondary Feedback Comparator Bias Generator Blocks: * +5V Linear Regulator * Automatic Bootstrap Switchover Circuit * +2.505V Reference These internal IC blocks aren't powered directly from the battery. Instead, a +5V linear regulator steps down the battery voltage to supply both the IC internal rail (VL pin) as well as the gate drivers. The synchronousswitch gate driver is directly powered from +5V VL, while the high-side-switch gate driver is indirectly powered from VL via an external diode-capacitor boost circuit. An automatic bootstrap circuit turns off the +5V linear regulator and powers the IC from its output voltage if the output is above 4.5V.
Table 3. Operating-Mode Truth Table
SHDN Low SKIP X LOAD CURRENT X MODE NAME Shutdown DESCRIPTION All circuit blocks turned off; supply current = 1A typ Pulse-skipping; supply current = 700A typ at VIN = 10V; discontinuous inductor current Pulse-skipping; continuous inductor current Constant-frequency PWM; continuous inductor current
MAX796/MAX797/MAX799
High
Low
Low, <10%
Idle
High
Low
Medium, <30% High, >30%
Idle
High
Low
PWM
High
High
X
Constant-frequency PWM regardless of Low Noise* load; continuous (PWM) inductor current even at no load
PWM Controller Block
The heart of the current-mode PWM controller is a multi-input open-loop comparator that sums three signals: output voltage error signal with respect to the reference voltage, current-sense signal, and slope compensation ramp (Figure 3). The PWM controller is a direct summing type, lacking a traditional error amplifier and the phase shift associated with it. This directsumming configuration approaches the ideal of cycle-by-cycle control over the output voltage. Under heavy loads, the controller operates in full PWM mode. Each pulse from the oscillator sets the main PWM latch that turns on the high-side switch for a period determined by the duty factor (approximately VOUT/VIN). As the high-switch turns off, the synchronous rectifier latch is set. 60ns later the low-side switch turns on, and stays on until the beginning of the next clock cycle (in continuous mode) or until the inductor current crosses zero (in discontinuous mode). Under fault conditions where the inductor current exceeds the 100mV current-limit threshold, the high-side latch resets and the high-side switch turns off. At light loads (SKIP = low), the inductor current fails to exceed the 30mV threshold set by the minimum-current comparator. When this occurs, the controller goes into idle mode, skipping most of the oscillator pulses in order to reduce the switching frequency and cut back gate-charge losses. The oscillator is effectively gated off at light loads because the minimum-current comparator immediately resets the high-side latch at the
* MAX796/MAX799 have no SKIP pin and therefore can't go into low-noise mode. X = Don't Care
beginning of each cycle, unless the feedback signal falls below the reference voltage level. When in PWM mode, the controller operates as a fixedfrequency current-mode controller where the duty ratio is set by the input/output voltage ratio. The currentmode feedback system regulates the peak inductor current as a function of the output voltage error signal. Since the average inductor current is nearly the same as the peak current, the circuit acts as a switch-mode transconductance amplifier and pushes the second output LC filter pole, normally found in a duty-factorcontrolled (voltage-mode) PWM, to a higher frequency. To preserve inner-loop stability and eliminate regenerative inductor current "staircasing," a slope-compensation ramp is summed into the main PWM comparator to reduce the apparent duty factor to less than 50%. The relative gains of the voltage- and current-sense inputs are weighted by the values of current sources that bias three differential input stages in the main PWM comparator (Figure 4). The relative gain of the voltage comparator to the current comparator is internally fixed at K = 2:1. The resulting loop gain (which is relatively low) determines the 2.5% typical load regulation error. The low loop-gain value helps reduce output filter capacitor size and cost by shifting the unity-gain crossover to a lower frequency.
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Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
CSH 1X CSL REF FROM FEEDBACK DIVIDER
MAIN PWM COMPARATOR
R Q S LEVEL SHIFT
BST DH LX
SLOPE COMP
OSC
30mV SKIP (MAX797 ONLY) 4A
VL CURRENT LIMIT SHOOTTHROUGH CONTROL
SS
24R
2.5V SHDN N
1R
SYNCHRONOUS RECTIFIER CONTROL R -100mV S VL Q LEVEL SHIFT DL PGND
REF (MAX796) GND (MAX799) SECFB
1s SINGLE-SHOT NOTE 1 MAX796, MAX799 ONLY
NOTE 1: COMPARATOR INPUT POLARITIES ARE REVERSED FOR THE MAX799.
Figure 3. PWM Controller Detailed Block Diagram
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Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
VL R1 R2 TO PWM LOGIC UNCOMPENSATED HIGH-SPEED LEVEL TRANSLATOR AND BUFFER OUTPUT DRIVER I1 I2 I3
FB
REF CSH CSL SLOPE COMPENSATION
Figure 4. Main PWM Comparator Block Diagram
The output filter capacitor C2 sets a dominant pole in the feedback loop. This pole must roll off the loop gain to unity before the zero introduced by the output capacitor's parasitic resistance (ESR) is encountered (see Design Procedure section). A 60kHz pole-zero cancellation filter provides additional rolloff above the unity-gain crossover. This internal 60kHz lowpass compensation filter cancels the zero due to the filter capacitor's ESR. The 60kHz filter is included in the loop in both fixed- and adjustable-output modes.
Internal VL and REF Supplies
An internal regulator produces the 5V supply (VL) that powers the PWM controller, logic, reference, and other blocks within the MAX796. This +5V low-dropout linear regulator can supply up to 5mA for external loads, with a reserve of 20mA for gate-drive power. Bypass VL to GND with 4.7F. Important: VL must not be allowed to exceed 6V. Measure VL with the main output fully loaded. If VL is being pumped up above 5.5V, the probable cause is either excessive boost-diode capacitance or excessive ripple at V+. Use only small-signal diodes for D2 (1N4148 preferred) and bypass V+ to PGND with 0.1F directly at the package pins. The 2.505V reference (REF) is accurate to 1.6% over temperature, making REF useful as a precision system reference. Bypass REF to GND with 0.33F minimum. REF can supply up to 1mA for external loads. However, if tight-accuracy specs for either VOUT or REF are essential, avoid loading REF with more than 100A. Loading REF reduces the main output voltage slightly, according to the reference-voltage load regulation error. In MAX799 applications, ensure that the SECFB divider doesn't load REF heavily. When the main output voltage is above 4.5V, an internal Pchannel MOSFET switch connects CSL to VL while simultaneously shutting down the VL linear regulator. This action bootstraps the IC, powering the internal circuitry from the output voltage, rather than through a linear regulator from the battery. Bootstrapping reduces power dissipation caused by gate-charge and quiescent losses by providing that power from a 90%-efficient switch-mode source, rather than from a 50%-efficient linear regulator.
15
Synchronous-Rectifier Driver (DL Pin)
Synchronous rectification reduces conduction losses in the rectifier by shunting the normal Schottky diode with a low-resistance MOSFET switch. The synchronous rectifier also ensures proper start-up of the boost-gate driver circuit. If you must omit the synchronous power MOSFET for cost or other reasons, replace it with a small-signal MOSFET such as a 2N7002. If the circuit is operating in continuous-conduction mode, the DL drive waveform is simply the complement of the DH high-side drive waveform (with controlled dead time to prevent cross-conduction or "shootthrough"). In discontinuous (light-load) mode, the synchronous switch is turned off as the inductor current falls through zero. The synchronous rectifier works under all operating conditions, including idle mode. The synchronous-switch timing is further controlled by the secondary feedback (SECFB) signal in order to improve multiple-output cross-regulation (see Secondary Feedback-Regulation Loop section).
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Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
It's often possible to achieve a bootstrap-like effect, even for circuits that are set to VOUT < 4.5V, by powering VL from an external-system +5V supply. To achieve this pseudo-bootstrap, add a Schottky diode between the external +5V source and VL, with the cathode to the VL side. This circuit provides a 1% to 2% efficiency boost and also extends the minimum battery input to less than 4V. The external source must be in the range of 4.8V to 6V. Another way to achieve a pseudo-bootstrap is to add an extra flyback winding to the main inductor to generate the +5V bootstrap source, as shown in the +3.3V/+5V Dual-Output Application (Figure 12).
BATTERY +5V VL SUPPLY INPUT
VL
MAX796 MAX797 MAX799
VL
BST DH LX VL DL
LEVEL TRANSLATOR PWM
Boost High-Side Gate-Driver Supply (BST Pin)
Gate-drive voltage for the high-side N-channel switch is generated by a flying-capacitor boost circuit as shown in Figure 5. The capacitor is alternately charged from the VL supply and placed in parallel with the high-side MOSFET's gate-source terminals. On start-up, the synchronous rectifier (low-side MOSFET) forces LX to 0V and charges the BST capacitor to 5V. On the second half-cycle, the PWM turns on the high-side MOSFET by closing an internal switch between BST and DH. This provides the necessary enhancement voltage to turn on the high-side switch, an action that "boosts" the 5V gate-drive signal above the battery voltage. Ringing seen at the high-side MOSFET gate (DH) in discontinuous-conduction mode (light loads) is a natural operating condition, and is caused by the residual energy in the tank circuit formed by the inductor and stray capacitance at the switching node LX. The gatedriver negative rail is referred to LX, so any ringing there is directly coupled to the gate-drive output.
Figure 5. Boost Supply for Gate Drivers
Oscillator Frequency and Synchronization (SYNC Pin)
The SYNC input controls the oscillator frequency. Connecting SYNC to GND or to VL selects 150kHz operation; connecting SYNC to REF selects 300kHz. SYNC can also be used to synchronize with an external 5V CMOS or TTL clock generator. SYNC has a guaranteed 190kHz to 340kHz capture range. 300kHz operation optimizes the application circuit for component size and cost. 150kHz operation provides increased efficiency and improved load-transient response at low input-output voltage differences (see Low-Voltage Operation section).
Current-Limiting and Current-Sense Inputs (CSH and CSL)
The current-limit circuit resets the main PWM latch and turns off the high-side MOSFET switch whenever the voltage difference between CSH and CSL exceeds 100mV. This limiting is effective for both current flow directions, putting the threshold limit at 100mV. The tolerance on the positive current limit is 20%, so the external low-value sense resistor must be sized for 80mV/R1 to guarantee enough load capability, while components must be designed to withstand continuous current stresses of 120mV/R1. For breadboarding purposes or very high-current applications, it may be useful to wire the current-sense inputs with a twisted pair rather than PC traces. This twisted pair needn't be anything special, perhaps two pieces of wire-wrap wire twisted together.
16
Low-Noise Mode (SKIP Pin)
The low-noise mode (SKIP = high) is useful for minimizing RF and audio interference in noise-sensitive applications such as SoundblasterTM hi-fi audio-equipped systems, cellular phones, RF communicating computers, and electromagnetic pen-entry systems. See the summary of operating modes in Table 3. SKIP can be driven from an external logic signal. The MAX797 can reduce interference due to switching noise by ensuring a constant switching frequency regardless of load and line conditions, thus concentrating the emissions at a known frequency outside the system audio or IF bands. Choose an oscillator freSoundblaster is a trademark of Creative Labs.
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Step-Down Controllers with Synchronous Rectifier for CPU Power
quency where harmonics of the switching frequency don't overlap a sensitive frequency band. If necessary, synchronize the oscillator to a tight-tolerance external clock generator. The low-noise mode (SKIP = high) forces two changes upon the PWM controller. First, it ensures fixed-frequency operation by disabling the minimum-current comparator and ensuring that the PWM latch is set at the beginning of each cycle, even if the output is in regulation. Second, it ensures continuous inductor current flow, and thereby suppresses discontinuous-mode inductor ringing by changing the reverse current-limit detection threshold from zero to -100mV, allowing the inductor current to reverse at very light loads. In most applications, SKIP should be tied to GND in order to minimize quiescent supply current. Supply current with SKIP high is typically 10mA to 20mA, depending on external MOSFET gate capacitance and switching losses. Forced continuous conduction via SKIP can improve cross regulation of transformer-coupled multiple-output supplies. This second function of the SKIP pin produces a result that is similar to the method of adding secondary regulation via the SECFB feedback pin, but with much higher quiescent supply current. Still, improving cross regulation by enabling SKIP instead of building in SECFB feedback can be useful in noisesensitive applications, since SECFB and SKIP are mutually exclusive pins/functions in the MAX796 family. Remote sensing of the output voltage, while not possible in fixed-output mode due to the combined nature of the voltage- and current-sense input (CSL), is easy to achieve in adjustable mode by using the top of the external resistor divider as the remote sense point. Fixed-output accuracy is guaranteed to be 4% over all conditions. In special circumstances, it may be necessary to improve upon this output accuracy. The HighAccuracy Adjustable-Output Application (Figure 18) provides 2.5% accuracy by adding an integrator-type error amplifier. The breakdown voltage rating of the current-sense inputs (7V absolute maximum) determines the 6V maximum output adjustment range. To extend this output range, add two matched resistor dividers and speedup capacitors to form a level translator, as shown in Figure 8. Be sure to set these resistor ratios accurately (using 0.1% resistors), to avoid adding excessive error to the 100mV current-limit threshold.
MAX796/MAX797/MAX799
Secondary Feedback-Regulation Loop (SECFB Pin)
A flyback winding control loop regulates a secondary winding output (MAX796/MAX799 only), improving cross-regulation when the primary is lightly loaded or when there is a low input-output differential voltage. If SECFB crosses its regulation threshold (VREF for the
Adjustable-Output Feedback (Dual-Mode FB Pin)
Adjusting the main output voltage with external resistors is easy for any of the devices in the MAX796 family, via the circuit of Figure 6. The nominal output voltage (given by the formula in Figure 6) should be set approximately 2% high in order to make up for the MAX796's -2.5% typical load-regulation error. For example, if designing for a 3.0V output, use a resistor ratio that results in a nominal output voltage of 3.06V. This slight offsetting gives the best possible accuracy. Recommended normal values for R5 range from 5k to 100k. To achieve a 2.505V nominal output, simply connect FB to CSL directly. To achieve output voltages lower than 2.5V, use an external reference-voltage source higher than VREF, as shown in Figure 7. For best accuracy, this second reference voltage should be much higher than VREF. Alternatively, an external op amp could be used to gain-up REF in order to create the second reference source. This scheme requires a minimum load on the output in order to sink the R3/R4 divider current.
DH
V+
REMOTE SENSE LINES
MAIN OUTPUT
MAX796 MAX797 DL MAX799
R4 CSH CSL FB GND R5
VOUT = VREF
R4 (1 + ---) R5
WHERE VREF (NOMINAL) = 2.505V
Figure 6. Adjusting the Main Output Voltage
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17
Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
V+ VREF2 >>VREF (4.096V) V+ DH RSENSE OUTPUT (8V AS SHOWN) R3 2.43k
MAX874
R5
DH
R4 MAIN OUTPUT
MAX796 MAX797 DL MAX799
0.01F CSH CSL FB GND R2 1.1k R3 VOUT = VREF (1 + ---) R4 DIVIDER IMPEDANCE 5k (EACH LEG)
R1 2.43k
MAX796 MAX797 DL MAX799
CSH CSL FB GND R4 VOUT = VREF - (VREF2 - VREF) (---) R5
0.01F
R4 1.1k
Figure 7. Output Voltage Less than 2.5V
Figure 8. Adjusting the Output Voltage to Greater than 6V
MAX796), a 1s one-shot is triggered that extends the low-side switch's on-time beyond the point where the inductor current crosses zero (in discontinuous mode). This causes the inductor (primary) current to reverse, which in turn pulls current out of the output filter capacitor and causes the flyback transformer to operate in the forward mode. The low impedance presented by the transformer secondary in the forward mode dumps current into the secondary output, charging up the secondary capacitor and bringing SECFB back into regulation. The SECFB feedback loop does not improve secondary output accuracy in normal flyback mode, where the main (primary) output is heavily loaded. In this mode, secondary output accuracy is determined, as usual, by the secondary rectifier drop, turns ratio, and accuracy of the main output voltage. So, a linear post-regulator may still be needed in order to meet tight output accuracy specifications. The secondary output voltage-regulation point is determined by an external resistor divider at SECFB. For negative output voltages, the SECFB comparator is referenced to GND (MAX799); for positive output voltages, SECFB regulates at the 2.505V reference (MAX796). As a result, output resistor divider connections and design equations for the two device types differ slightly (Figure 9). Ordinarily, the secondary regulation point is set 5% to 10% below the voltage normally produced by the flyback effect. For example, if the output voltage as determined by the turns ratio is +15V, the feedback resistor ratio should be set to produce about +13.5V; otherwise, the SECFB one-shot might be triggered unintentionally, causing an unnecessary increase in supply current and output
18
noise. In negative-output (MAX799) applications, the resistor divider acts as a load on the internal reference, which in turn can cause errors at the main output. Avoid overloading REF (see the Reference Load-Regulation Error vs. Load Current graph in the Typical Operating Characteristics). 100k is a good value for R3 in MAX799 circuits.
Soft-Start Circuit (SS)
Soft-start allows a gradual increase of the internal current-limit level at start-up for the purpose of reducing input surge currents, and perhaps for power-supply sequencing. In shutdown mode, the soft-start circuit holds the SS capacitor discharged to ground. When SHDN goes high, a 4A current source charges the SS capacitor up to 3.2V. The resulting linear ramp waveform causes the internal current-limit level to increase proportionally from 20mV to 100mV. The main output capacitor thus charges up relatively slowly, depending on the SS capacitor value. The exact time of the output rise depends on output capacitance and load current and is typically 1ms per nanofarad of soft-start capacitance. With no SS capacitor connected, maximum current limit is reached within 10s.
Shutdown
Shutdown mode (SHDN = 0V) reduces the V+ supply current to typically 1A. In this mode, the reference and VL are inactive. SHDN is a logic-level input, but it can be safely driven to the full V+ range. Connect SHDN to V+ for automatic start-up. Do not allow slow transitions (slower than 0.02V/s) on SHDN.
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Step-Down Controllers with Synchronous Rectifier for CPU Power
_________________Design Procedure
The five pre-designed standard application circuits (Figure 1 and Table 1) contain ready-to-use solutions for common applications. Use the following design procedure to optimize the basic schematic for different voltage or current requirements. Before beginning a design, firmly establish the following: VIN(MAX), the maximum input (battery) voltage. This value should include the worst-case conditions, such as no-load operation when a battery charger or AC adapter is connected but no battery is installed. VIN(MAX) must not exceed 30V. This 30V upper limit is determined by the breakdown voltage of the BST floating gate driver to GND (36V absolute maximum). VIN(MIN), the minimum input (battery) voltage. This should be taken at full-load under the lowest battery conditions. If VIN(MIN) is less than 4.5V, a special circuit must be used to externally hold up VL above 4.8V. If the minimum input-output difference is less than 1.5V, the filter capacitance required to maintain good AC load regulation increases.
Inductor Value
The exact inductor value isn't critical and can be adjusted freely in order to make tradeoffs among size, cost, and efficiency. Although lower inductor values will minimize size and cost, they will also reduce efficiency due to higher peak currents. To permit use of the physically smallest inductor, lower the inductance until the circuit is operating at the border between continuous and discontinuous modes. Reducing the inductor value even further, below this crossover point, results in discontinuous-conduction operation even at full load. This helps reduce output filter capacitance requirements but causes the core energy storage requirements to increase again. On the other hand, higher inductor values will increase efficiency, but at some point resistive losses due to extra turns of wire will exceed the benefit gained from lower AC current levels. Also, high inductor values can affect load-transient response; see the VSAG equation in the Low-Voltage Operation section. The following equations are given for continuous-conduction operation since the MAX796 is mainly intended for high-efficiency battery-powered applications. See Appendix A in Maxim's Battery Management and DCDC Converter Circuit Collection for crossover point and discontinuous-mode equations. Discontinuous conduction doesn't affect normal idle-mode operation.
0.33F
MAX796/MAX797/MAX799
R3 SECFB 1-SHOT TRIG 2.505V REF V+ 1-SHOT TRIG POSITIVE SECONDARY OUTPUT
REF SECFB
R3
R2
R2 V+ NEGATIVE SECONDARY OUTPUT
DH
DH
MAX796
DL
MAIN OUTPUT
MAX799
DL
MAIN OUTPUT
+VTRIP = VREF
R2 (1 + ---) R3
WHERE VREF (NOMINAL) = 2.505V
-VTRIP = -VREF
R2 (---) R3
R3 = 100k (RECOMMENDED)
Figure 9. Secondary-Output Feedback Dividers, MAX796 vs. MAX799
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Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
Three key inductor parameters must be specified: inductance value (L), peak current (IPEAK), and DC resistance (RDC). The following equation includes a constant LIR, which is the ratio of inductor peak-topeak AC current to DC load current. A higher value of LIR allows smaller inductance, but results in higher losses and ripple. A good compromise between size and losses is found at a 30% ripple current to load current ratio (LIR = 0.3), which corresponds to a peak inductor current 1.15 times higher than the DC load current. VOUT (VIN(MAX) - VOUT) L = ---------------------- VIN(MAX) x f x IOUT x LIR where: f = switching frequency, normally 150kHz or 300kHz IOUT = maximum DC load current LIR = ratio of AC to DC inductor current, typically 0.3 The peak inductor current at full load is 1.15 x IOUT if the above equation is used; otherwise, the peak current can be calculated by: VOUT (VIN(MAX) - VOUT) IPEAK = ILOAD + ---------------------- 2 x f x L x VIN(MAX) The inductor's DC resistance is a key parameter for efficiency performance and must be ruthlessly minimized, preferably to less than 25m at IOUT = 3A. If a standard off-the-shelf inductor is not available, choose a core with an LI2 rating greater than L x IPEAK2 and wind it with the largest diameter wire that fits the winding area. For 300kHz applications, ferrite core material is strongly preferred; for 150kHz applications, Kool-mu (aluminum alloy) and even powdered iron can be acceptable. If light-load efficiency is unimportant (in desktop 5V-to-3V applications, for example) then lowpermeability iron-powder cores, such as the Micrometals type found in Pulse Engineering's 2.1H PE-53680, may be acceptable even at 300kHz. For high-current applications, shielded core geometries (such as toroidal or pot core) help keep noise, EMI, and switching-waveform jitter low. may be used in place of IPEAK if the inductor value has been set for LIR = 0.3 or less (high inductor values) and 300kHz operation is selected. Low-inductance resistors, such as surface-mount metal-film resistors, are preferred. 80mV RSENSE = -------- IPEAK
Input Capacitor Value
Place a small ceramic capacitor (0.1F) between V+ and GND, close to the device. Also, connect a low-ESR bulk capacitor directly to the drain of the high-side MOSFET. Select the bulk input filter capacitor according to input ripple-current requirements and voltage rating, rather than capacitor value. Electrolytic capacitors that have low enough ESR to meet the ripple-current requirement invariably have more than adequate capacitance values. Aluminum-electrolytic capacitors such as Sanyo OS-CON or Nichicon PL are preferred over tantalum types, which could cause power-up surge-current failure, especially when connecting to robust AC adapters or low-impedance batteries. RMS input ripple current is determined by the input voltage and load current, with the worst possible case occurring at VIN = 2 x VOUT: ---------------- VOUT (VIN - VOUT) IRMS = ILOAD x -------------------- VIN IRMS = ILOAD / 2 when VIN is 2 x VOUT
Output Filter Capacitor Value
The output filter capacitor values are generally determined by the ESR (effective series resistance) and voltage rating requirements rather than actual capacitance requirements for loop stability. In other words, the lowESR electrolytic capacitor that meets the ESR requirement usually has more output capacitance than is required for AC stability. Use only specialized low-ESR capacitors intended for switching-regulator applications, such as AVX TPS, Sprague 595D, Sanyo OS-CON, or Nichicon PL series. To ensure stability, the capacitor must meet both minimum capacitance and maximum ESR values as given in the following equations: VREF (1 + VOUT / VIN(MIN)) CF > ------------------------- VOUT x RSENSE x f RSENSE x VOUT RESR < ---------------- VREF (can be multiplied by 1.5, see note below)
Current-Sense Resistor Value
The current-sense resistor value is calculated according to the worst-case-low current-limit threshold voltage (from the Electrical Characteristics table) and the peak inductor current. The continuous-mode peak inductorcurrent calculations that follow are also useful for sizing the switches and specifying the inductor-current saturation ratings. In order to simplify the calculation, ILOAD
20
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Step-Down Controllers with Synchronous Rectifier for CPU Power
These equations are "worst-case" with 45 degrees of phase margin to ensure jitter-free fixed-frequency operation and provide a nicely damped output response for zero to full-load step changes. Some cost-conscious designers may wish to bend these rules by using less expensive (lower quality) capacitors, particularly if the load lacks large step changes. This practice is tolerable, provided that some bench testing over temperature is done to verify acceptable noise and transient response. There is no well-defined boundary between stable and unstable operation. As phase margin is reduced, the first symptom is a bit of timing jitter, which shows up as blurred edges in the switching waveforms where the scope won't quite sync up. Technically speaking, this (usually) harmless jitter is unstable operation, since the switching frequency is now non-constant. As the capacitor quality is reduced, the jitter becomes more pronounced and the load-transient output voltage waveform starts looking ragged at the edges. Eventually, the load-transient waveform has enough ringing on it that the peak noise levels exceed the allowable output voltage tolerance. Note that even with zero phase margin and gross instability present, the output voltage noise never gets much worse than IPEAK x RESR (under constant loads, at least). Designers of RF communicators or other noise-sensitive analog equipment should be conservative and stick to the guidelines. Designers of notebook computers and similar commercial-temperature-range digital systems can multiply the RESR value by a factor of 1.5 without hurting stability or transient response. The output voltage ripple is usually dominated by the ESR of the filter capacitor and can be approximated as IRIPPLE x RESR. There is also a capacitive term, so the full equation for ripple in the continuous mode is VNOISE(p-p) = IRIPPLE x (RESR + 1 / (2 x pi x f x CF)). In idle mode, the inductor current becomes discontinuous with high peaks and widely spaced pulses, so the noise can actually be higher at light load compared to full load. In idle mode, the output ripple can be calculated as: 0.02 x RESR VNOISE(p-p) = ------------ + RSENSE 0.0003 x L x [1 / VOUT + 1 / (VIN - VOUT)] -------------------------------------- (RSENSE)2 x CF
Transformer Design (MAX796/MAX799 Only)
Buck-plus-flyback applications, sometimes called "coupled-inductor" topologies, need a transformer in order to generate multiple output voltages. The basic electrical design is a simple task of calculating turns ratios and adding the power delivered to the secondary in order to calculate the current-sense resistor and primary inductance. However, extremes of low input-output differentials, widely different output loading levels, and high turns ratios can complicate the design due to parasitic transformer parameters such as inter-winding capacitance, secondary resistance, and leakage inductance. For examples of what is possible with real-world transformers, see the graphs of Maximum Secondary Current vs. Input Voltage in the Typical Operating Characteristics. Power from the main and secondary outputs is lumped together to obtain an equivalent current referred to the main output voltage (see Inductor L1 for definitions of parameters). Set the value of the current-sense resistor at 80mV / ITOTAL. PTOTAL = the sum of the output power from all outputs ITOTAL = PTOTAL / VOUT = the equivalent output current referred to VOUT VOUT (VIN(MAX) - VOUT) L(primary) = -------------------------- VIN(MAX) x f x ITOTAL x LIR VSEC + VFWD Turns Ratio N = ---------------------------- VOUT(MIN) + VRECT + VSENSE where: VSEC is the minimum required rectified secondary-output voltage VFWD is the forward drop across the secondary rectifier VOUT(MIN) is the minimum value of the main output voltage (from the Electrical Characteristics) VRECT is the on-state voltage drop across the synchronous-rectifier MOSFET VSENSE is the voltage drop across the sense resistor In positive-output (MAX796) applications, the transformer secondary return is often referred to the main output voltage rather than to ground in order to reduce the needed turns ratio. In this case, the main output voltage must first be subtracted from the secondary voltage to obtain VSEC.
MAX796/MAX797/MAX799
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Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
______Selecting Other Components
MOSFET Switches
The two high-current N-channel MOSFETs must be logic-level types with guaranteed on-resistance specifications at VGS = 4.5V. Lower gate threshold specs are better (i.e., 2V max rather than 3V max). Drain-source breakdown voltage ratings must at least equal the maximum input voltage, preferably with a 20% derating factor. The best MOSFETs will have the lowest on-resistance per nanocoulomb of gate charge. Multiplying RDS(ON) x QG provides a meaningful figure by which to compare various MOSFETs. Newer MOSFET process technologies with dense cell structures generally give the best performance. The internal gate drivers can tolerate >100nC total gate charge, but 70nC is a more practical upper limit to maintain best switching times. In high-current applications, MOSFET package power dissipation often becomes a dominant design factor. I2R power losses are the greatest heat contributor for both high- and low-side MOSFETs. I2R losses are distributed between Q1 and Q2 according to duty factor (see the equations below). Switching losses affect the upper MOSFET only, since the Schottky rectifier clamps the switching node before the synchronous rectifier turns on. Gate-charge losses are dissipated by the driver- er and don't heat the MOSFET. Ensure that both MOSFETs are within their maximum junction temperature at high ambient temperature by calculating the temperature rise according to package thermal-resistance specifications. The worst-case dissipation for the high-side MOSFET occurs at the minimum battery voltage, and the worst-case for the low-side MOSFET occurs at the maximum battery voltage. PD (upper FET) = ILOAD2 x RDS(ON) x DUTY + VIN x ILOAD x f x VIN x CRSS (----------- +20ns) I
GATE
During short circuit, Q2's duty factor can increase to greater than 0.9 according to: Q2 DUTY (short circuit) = 1 - [VQ2 / (VIN(MAX) - VQ1)] where the on-state voltage drop VQ = (120mV / RSENSE) x RDS(ON).
Rectifier Diode D1
Rectifier D1 is a clamp that catches the negative inductor swing during the 110ns dead time between turning off the high-side MOSFET and turning on the low-side. D1 must be a Schottky type in order to prevent the lossy parasitic MOSFET body diode from conducting. It is acceptable to omit D1 and let the body diode clamp the negative inductor swing, but efficiency will drop one or two percent as a result. Use an MBR0530 (500mA rated) type for loads up to 1.5A, a 1N5819 type for loads up to 3A, or a 1N5822 type for loads up to 10A. D1's rated reverse breakdown voltage must be at least equal to the maximum input voltage, preferably with a 20% derating factor.
Boost-Supply Diode D2
A signal diode such as a 1N4148 works well for D2 in most applications. If the input voltage can go below 6V, use a small (20mA) Schottky diode for slightly improved efficiency and dropout characteristics. Don't use large power diodes such as 1N5817 or 1N4001, since high junction capacitance can cause VL to be pumped up to excessive voltages.
Rectifier Diode D3 (Transformer Secondary Diode)
The secondary diode in coupled-inductor applications must withstand high flyback voltages greater than 60V, which usually rules out most Schottky rectifiers. Common silicon rectifiers such as the 1N4001 are also prohibited, as they are far too slow. This often makes fast silicon rectifiers such as the MURS120 the only choice. The flyback voltage across the rectifier is related to the VIN-VOUT difference according to the transformer turns ratio: VFLYBACK = VSEC + (VIN - VOUT) x N where: N is the transformer turns ratio SEC/PRI VSEC is the maximum secondary DC output voltage VOUT is the primary (main) output voltage Subtract the main output voltage (VOUT) from VFLYBACK in this equation if the secondary winding is returned to VOUT and not to ground. The diode reverse breakdown rating must also accommodate any ringing due to leakage inductance. D3's current rating should be at least twice the DC load current on the secondary output.
PD (lower FET) = ILOAD2 x RDS(ON) x (1 - DUTY) DUTY = (VOUT + VQ2) / (VIN - VQ1) where: On-state voltage drop VQ_ = ILOAD x RDS(ON) CRSS = MOSFET reverse transfer capacitance IGATE = DH driver peak output current capability (1A typically) 20ns = DH driver inherent rise/fall time Under output short circuit, the synchronous-rectifier MOSFET suffers extra stress and may need to be oversized if a continuous DC short circuit must be tolerated.
22
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Step-Down Controllers with Synchronous Rectifier for CPU Power
____________Low-Voltage Operation
Low input voltages and low input-output differential voltages each require some extra care in the design. Low absolute input voltages can cause the VL linear regulator to enter dropout, and eventually shut itself off. Low input voltages relative to the output (low VIN-VOUT differential) can cause bad load regulation in multi-output flyback applications. See the design equations in the Transformer Design section. Finally, low VIN-VOUT differentials can also cause the output voltage to sag when the load current changes abruptly. The amplitude of the sag is a function of inductor value and maximum duty factor (an Electrical Characteristics parameter, 93% guaranteed over temperature at f = 150kHz) as follows: (ISTEP)2 x L VSAG = ------------------------------ 2 x CF x (VIN(MIN) x DMAX - VOUT) The cure for low-voltage sag is to increase the value of the output capacitor. For example, at VIN = 5.5V, VOUT = 5V, L = 10H, f = 150kHz, a total capacitance of 660F will prevent excessive sag. Note that only the capacitance requirement is increased and the ESR requirements don't change. Therefore, the added capacitance can be supplied by a low-cost bulk capacitor in parallel with the normal low-ESR capacitor.
__________Applications Information
Heavy-Load Efficiency Considerations
The major efficiency loss mechanisms under loads are, in the usual order of importance: * P(I2R), I2R losses * P(gate), gate-charge losses * P(diode), diode-conduction losses * P(tran), transition losses * P(cap), capacitor ESR losses * P(IC), losses due to the operating supply current of the IC Inductor-core losses are fairly low at heavy loads because the inductor's AC current component is small. Therefore, they aren't accounted for in this analysis. Ferrite cores are preferred, especially at 300kHz, but powdered cores such as Kool-mu can work well. Efficiency = POUT / PIN x 100% = POUT / (POUT + PTOTAL) x 100% PTOTAL = P(I2R) + P(gate) + P(diode) + P(tran) + P(cap) + P(IC) P(I2R) = (ILOAD)2 x (RDC + RDS(ON) + RSENSE) where RDC is the DC resistance of the coil, RDS(ON) is the MOSFET on-resistance, and RSENSE is the current-
MAX796/MAX797/MAX799
Table 4. Low-Voltage Troubleshooting
SYMPTOM Sag or droop in VOUT under step load change Dropout voltage is too high (VOUT follows VIN as VIN decreases) Unstable--jitters between two distinct duty factors CONDITION ROOT CAUSE SOLUTION Increase bulk output capacitance per formula above. Reduce inductor value. Reduce f to 150kHz. Reduce MOSFET on-resistance and coil DCR. Reduce L value. Tolerate the remaining jitter (extra output capacitance helps somewhat). Low VIN-VOUT differential, Limited inductor-current slew <1.5V rate per cycle. Low VIN-VOUT differential, Maximum duty-cycle limits <1V exceeded. Inherent limitation of fixed-freLow VIN-VOUT differential, quency current-mode SMPS <1V slope compensation.
Secondary output won't support a load
Not enough duty cycle left to Reduce f to 150kHz. Reduce secondary Low VIN-VOUT differential, initiate forward-mode operation. impedances--use Schottky if possible. VIN < 1.3 x VOUT(main) Small AC current in primary can't Stack secondary winding on main output. (MAX796/MAX799 only) store energy for flyback operation. Low input voltage, <5V VL linear regulator is going into dropout and isn't providing good gate-drive levels. Use a small 20mA Schottky diode for boost diode D2. Supply VL from an external source.
High supply current, poor efficiency Won't start under load or quits before battery is completely dead
Low input voltage, <4.5V
VL output is so low that it hits the Supply VL from an external source other VL UVLO threshold at 4.2V max. than VBATT, such as the system 5V supply.
______________________________________________________________________________________
23
Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
sense resistor value. The RDS(ON) term assumes identical MOSFETs for the high- and low-side switches because they time-share the inductor current. If the MOSFETs aren't identical, their losses can be estimated by averaging the losses according to duty factor. P(gate) = gate-driver loss = qG x f x VL where VL is the MAX796 internal logic supply voltage (5V), and qG is the sum of the gate-charge values for low- and high-side switches. For matched MOSFETs, qG is twice the data sheet value of an individual MOSFET. If VOUT is set to less than 4.5V, replace VL in this equation with VBATT. In this case, efficiency can be improved by connecting VL to an efficient 5V source, such as the system +5V supply. P(diode) = diode conduction losses = ILOAD x VFWD x tD x f where tD is the diode conduction time (110ns typ) and VFWD is the forward voltage of the Schottky. PD(tran) = transition loss = VBATT x CRSS VBATT x ILOAD x f x (-------------- + 20ns) IGATE where CRSS is the reverse transfer capacitance of the high-side MOSFET (a data sheet parameter), IGATE is the DH gate-driver peak output current (1A typ), and 20ns is the rise/fall time of the DH driver (20ns typ). P(cap) = input capacitor ESR loss = (IRMS)2 x RESR where IRMS is the input ripple current as calculated in the Input Capacitor Value section of the Design Procedure. ground plane is essential for optimum performance. In most applications, the circuit will be located on a multilayer board and full use of the four or more copper layers is recommended. Use the top layer for high-current connections, the bottom layer for quiet connections (REF, SS, GND), and the inner layers for an uninterrupted ground plane. Use the following step-by-step guide. 1) Place the high-power components (C1, C2, Q1, Q2, D1, L1, and R1) first, with their grounds adjacent. Priority 1: Minimize current-sense resistor trace lengths (see Figure 10). Priority 2: Minimize ground trace lengths in the high-current paths (discussed below). Priority 3: Minimize other trace lengths in the highcurrent paths. Use >5mm wide traces. C1 to Q1: 10mm max length. D1 cathode to Q2: 5mm max length LX node (Q1 source, Q2 drain, D1 cathode, inductor): 15mm max length Ideally, surface-mount power components are butted up to one another with their ground terminals almost touching. These high-current grounds (C1-, C2-, source of Q2, anode of D1, and PGND) are then connected to each other with a wide filled zone of top-layer copper, so that they don't go through vias. The resulting top-layer "sub-ground-plane" is connected to the normal inner-layer ground plane at the output ground terminals. This ensures that the analog GND of the IC is sensing at the output terminals of the supply, without interference from IR drops and ground noise. Other high-current paths should also be minimized, but focusing ruthlessly on short ground and current-sense connections eliminates about 90% of all PC layout headaches. See the evaluation kit PC board layouts for examples. 2) Place the IC and signal components. Keep the main switching node (LX node) away from sensitive analog components (current-sense traces and REF and SS capacitors). Placing the IC and analog components on the opposite side of the board from the power-switching node is desirable. Important: the IC must be no farther than 10mm from the currentsense resistor. Keep the gate-drive traces (DH, DL, and BST) shorter than 20mm and route them away from CSH, CSL, REF, and SS. 3) Employ a single-point star ground where the input ground trace, power ground (sub-ground-plane), and normal ground plane all meet at the output ground terminal of the supply.
Light-Load Efficiency Considerations
Under light loads, the PWM operates in discontinuous mode, where the inductor current discharges to zero at some point during the switching cycle. This causes the AC component of the inductor current to be high compared to the load current, which increases core losses and I2R losses in the output filter capacitors. Obtain best light-load efficiency by using MOSFETs with moderate gate-charge levels and by using ferrite, MPP, or other low-loss core material. Avoid powdered iron cores; even Kool-mu (aluminum alloy) is not as good as ferrite.
__PC Board Layout Considerations
Good PC board layout is required to achieve specified noise, efficiency, and stability performance. The PC board layout artist must be provided with explicit instructions, preferably a pencil sketch of the placement of power switching components and high-current routing. See the evaluation kit PC board layouts in the MAX796 and MAX797 EV kit manuals for examples. A
24
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Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
FAT, HIGH-CURRENT TRACES MAIN CURRENT PATH
SENSE RESISTOR
MAX796 MAX797 MAX799
Figure 10. Kelvin Connections for the Current-Sense Resistor
_________________________________________________________Application Circuits
VIN (6.5V TO 18V) 22F, 35V C2 4.7F V+ DH SHDN BST LX 10 16 14 0.1F 15 D1 CMPSH -3A Si9410 D2 EC11FS1 210k, 1% C2 4.7F C3 15F 2.5V 0.01F 49.9k, 1% +15V AT 250mA
2 SECFB
7 FB
11 VL
ON/OFF
6
18V 1/4 W +5V AT 3A
MAX796
1 SS
T1 15H 2.2:1 Si9410 1N5819
20m 220F 6.3V
DL
13
PGND 12 0.01F (OPTIONAL) 4
GND
CSH CSL SYNC 5 3 0.33F REF
8 9 4700pF* T1 = TRANSPOWER TTI5870 * = OPTIONAL, MAY NOT BE NEEDED 22*
Figure 11. +5V/+15V Dual-Output Application (MAX796)
______________________________________________________________________________________ 25
Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
____________________________________________Application Circuits (continued)
33F, 35V VIN (8V TO 18V AS SHOWN) 102k, 1% 100k, 1% 10 V+ ON/OFF 6 2 SECFB 11 VL BST SHDN DH 14 16 0.1F 1N5819 Q1 1N4148 4.7F MBR0502L T1 1:1.5 +5V AT 500mA
47F
+3.3V AT 2A
LX
15
10H
25m 330F
MAX796
DL PGND
13 12
Q2
Q3
1N5817 1 SS CSH CSL 0.01F (OPTIONAL) GND 4 3 0.33F REF SYNC 5 FB 8 9 7 Q1-Q2 = Si9410 or EQUIVALENT Q3 = Si9955 or EQUIVALENT (50V) T1 = TDK 1:1.5 TRANSFORMER PC40EEM 12.7/13.7 - A160 CORE BEM 12.7/13.7 BOBBIN PRIMARY = 8 TURNS 24 AWG SECONDARY = 12 TURNS 24 AWG DESIGN FOR TIGHT MAGNETIC COUPLING
102k 1% 33.2k 1%
49.9k 1%
Figure 12. +3.3V/+5V Dual-Output Application (MAX796)
VIN (9V TO 18V) 22F, 35V 107k, 1% 1F 3 REF 5 SYNC 11 VL 2 SECFB V+ DH BST LX 10 4.7F 16 14 0.1F 15 1N5819 T1 15H 1:1.3 50m 1/2 Si9936 +5V OUT (+5V AT 1A) 220F 10V 1N4148 EQ11FS1 -5.5V OUT (-5.5V AT 200mA) 22F 10V 221k, 1% 1000pF
MAX799
ON/OFF 6 SHDN
DL PGND CSH CSL
13 12 8 9 7
1/2 Si9936
GND 4 1
SS
FB 0.01F (OPTIONAL)
T1 = TRANSPOWER TTI5926
Figure 13. 5V Dual-Output Application (MAX799)
26 ______________________________________________________________________________________
Step-Down Controllers with Synchronous Rectifier for CPU Power
____________________________________________Application Circuits (continued)
MAX796/MAX797/MAX799
INPUT 4.5V TO 30V
MAX797
V+ STANDARD 3.3V CIRCUIT MAIN 3.3V OUTPUT (CSL) VL (5V) +3.3V MAIN OUTPUT
REF (2.505V)
82pF 1k Q1 Si9433DY OR MMSF4P01
MAX473
100k, 1% 1.5k 20pF
+2.9V OUTPUT AT 2A
16k, 1% 10F 10F
SANYO OS-CON
Figure 14. 2.9V Low-Dropout Linear Regulator with Fast Transient Response
VIN 2.5V TO 5.25V C1 100F REF DH 0.33F GND SKIP BST 4.7F VL SYNC 100k 1N4148 33k 2N7002 L1 = SUMIDA CDRH125, 5H D1 = MOTOROLA MBR130 C1 - C3 = AVX TPS 100F, 10V Q1 = SILICONIX Si9936 (BOTH SECTIONS) OR MOTOROLA MMDF3N03L CSH 0.033 L1 5H DL Q1 D1
CSL
+5V AT 1A
MAX797
LX PGND V+ SHDN FB 0.1F 100k C2 C3 100F 100F
1N4148
0.01F
+3.3V (EXTERNAL)
190kHz - 340kHz
OPTIONAL SYNC AND LOW-VOLTAGE START-UP CIRCUIT
Figure 15. Low-Noise Boost Converter for Cellular Phones
______________________________________________________________________________________ 27
Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
____________________________________________Application Circuits (continued)
VIN 4.75V TO 6V C1 220F CSH SYNC REF 0.33F
0.01 L1 5H Q1 D1
CSL
+12V AT 2A
DH
MAX797
GND SKIP
LX PGND V+ C2 C3 150F 150F 191k
BST 4.7F VL SS 0.01F
SHDN FB
49.9k L1 = 2x SUMIDA CDRH125-100 IN PARALLEL D1 = MOTOROLA MBR640 Q1 = MOTOROLA MTD20N03HDL C1 = SANYO OS-CON 220F, 10V C2, C3 = SANYO OS-CON 150F, 16V
Figure 16. 5V-to-12V PWM Boost Converter
INPUT 3V TO 6.5V
CMPSH-3A CSH
33m T1 CSL
OUTPUT +5V AT 500mA
100F BST VL 4.7F DH LX Q1 220F 220F
MAX797
DL PGND
Q2
HI EFF LOW IQ SKIP
V+ SHDN FB 200k 0.33F Q1, Q2 = Si9410DY T1 = COILTRONIX CTX 10-4 10H PRIMARY, 1:1 START-UP SUPPLY VOLTAGE = 3.5V TYP 200k
SYNC
REF
GND
Figure 17. 90% Efficient, Low-Voltage PWM Flyback Converter (4 Cells to 5V)
28 ______________________________________________________________________________________
Step-Down Controllers with Synchronous Rectifier for CPU Power
____________________________________________Application Circuits (continued)
INPUT
MAX796/MAX797/MAX799
V+
SHDN
VL BST DH Q1
4.7F
OUTPUT 3.3V 1.8% SKIP LX L1 Q2 RSENSE REMOTE SENSE POINT
MAX797
DL PGND
SS 0.01F
CSH CSL FB GND SYNC REF 51k 5% TO VL 0.33F 1000pF 10k 200k 5% 51k 5% R1 63.4k 0.1%
VOUT = VREF
R1 (1 + ---) R2
ADJUST RANGE = 2.5V TO 4V AS SHOWN. OMIT R2 FOR VOUT = 2.5V. USE EXTERNAL REFERENCE (MAX872) FOR BETTER ACCURACY.
R2 200k 0.1%
MAX495
Figure 18. High-Accuracy Adjustable-Output Application
INPUT 4.5V TO 25V V+ FB 1N4148 VL BST 22F 22F SHDN DH LX L1 0.1F Si9410 1N5819 -5V AT 1.5A 4.7F
MAX797
CSH 0.025 CSL DL GND PGND SYNC REF SKIP 0.33F
Si9410 150F 150F
L1 = DALE LPE6562-A093
Figure 19. Negative-Output (Inverting Topology) Power Supply
______________________________________________________________________________________ 29
Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
____________________________________________Application Circuits (continued)
INPUT 0.1F 1N4148 V+ SHDN 0.1F LX Q2 D1 1N5819 100k 1% C2 220F 10H +5V OUTPUT AT 3A DL PGND SS 0.01F FB CSH 100k 1% VL BST DH Q1 T1 4.7F C1 2x 22F
MAX797
1.91, 1%
1N4148
SKIP
GND
CSL SYNC REF 0.33F
T1 = 1:70 5mm SURFACE-MOUNT TRANSFORMER DALE LPE-3325-A087 Q1, Q2 = MMSF5N03 OR Si9410DY
Figure 20. Buck Converter with Low-Loss SMT Current-Sense Transformer
INPUT 4.75V TO 5.5V C1 220F OS-CON R1 12m N1 = N2 = MTD20N03HDL L1 = COILCRAFT DO3316-332
0.1F D1 V+ VL BST DH LX ON/OFF N1 C3 0.1F L1 3.3H 4.7F
1.5V OUTPUT AT 5A C2 2 x 220F OS-CON
SHDN
DL
N2
D2 1N5820
MAX797
SS C6 0.01F
PGND CSH CSL R6 49.9k FB SYNC REF R3 66.5k 1% TO VL C7 330pF R5 150k R7 124k
SKIP GND
C5 0.33F
R4 100k 1%
MAX495
REMOTE SENSE LINE
Figure 21. 1.5V GTL Bus Termination Supply
30 ______________________________________________________________________________________
Step-Down Controllers with Synchronous Rectifier for CPU Power
____________________________________________Application Circuits (continued)
MAX796/MAX797/MAX799
10 VIN 10.5V to 28V 6 2X 22F 35V V+ SHDN VL BST SKIP DH 11 14 2 4.7F 16 15 8 D3 T1 3 9 13 12 0.025 Q2 D2 3X 100F 16V IOUT 2.5A 1.7 L1 10H D1 0.01F Q1
MAX797
LX CSH
REF 1 0.01F DL 5 SYNC FB 7 PGND GND 4 SS CSL
0.33F 0.1F 6 7 3 1.0k
MAX495
4 2
D1, D3 CENTRAL SEMI. CMPSH-3 D2 NIEC EC10QS02L, SCHOTTKY RECT. L1 DALE IHSM-4825 10H 15% T1 DALE LPE-3325-A087, CURRENT TRANSFORMER, 1:70 Q1, Q2 MOTOROLA MMSF5N03HD
0.33F
39k
Figure 22. Battery-Charger Current Source
______________________________________________________________________________________
31
Step-Down Controllers with Synchronous Rectifier for CPU Power MAX796/MAX797/MAX799
_Ordering Information (continued)
PART MAX797CPE MAX797CSE MAX797C/D MAX797EPE MAX797ESE MAX797MJE MAX799CPE MAX799CSE MAX799C/D MAX799EPE MAX799ESE MAX799MJE TEMP. RANGE 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -55C to +125C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -55C to +125C PIN-PACKAGE 16 Plastic DIP 16 Narrow SO Dice* 16 Plastic DIP 16 Narrow SO 16 CERDIP 16 Plastic DIP 16 Narrow SO Dice* 16 Plastic DIP 16 Narrow SO 16 CERDIP
REF DL SKIP (SECFB) LX
___________________Chip Topography
SS DH
BST
GND
PGND 0.16O" (4.064mm)
*Contact factory for dice specifications
SYNC
VL SHDN V+
FB
CSH
CSL 0.085" (2.159mm)
( ) ARE FOR MAX796/MAX799 ONLY.
TRANSISTOR COUNT: 913 SUBSTRATE CONNECTED TO GND
32
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